https://stackoverflow.com/questions/37070/what-is-the-meaning-of-non-temporal-memory-accesses-in-x86/37092#37092 What is the meaning of “non temporal” memory accesses in x86 Ask Question 106 37 This is a somewhat low-level question. In x86 assembly there are two SSE instructions: MOVDQA xmmi, m128 and MOVNTDQA xmmi, m128 The IA-32 Software Developer's Manual says that the NT in MOVNTDQA stands for Non-Temporal, and that otherwise it's the same as MOVDQA. My question is, what does Non-Temporal mean? x86 sse assembly shareimprove this question edited May 2 '12 at 11:10 kristianp 3,4322222 silver badges4343 bronze badges asked Aug 31 '08 at 20:18 Nathan Fellman 64.1k8282 gold badges227227 silver badges293293 bronze badges 4 Note that SSE4.1 MOVNTDQA xmmi, m128 is an NT load, while all the other NT instructions are stores, except for prefetchnta. The accepted answer here only seems to be talking about stores. This is what I've been able to turn up about NT loads. TL:DR: hopefully the CPU does something useful with the NT hint to minimize cache pollution, but they don't override the strongly-ordered semantics of "normal" WB memory, so they do have to use the cache. – Peter Cordes Nov 23 '16 at 7:25 3 Update: NT loads may not do anything useful except on UCSW memory regions on most CPUs (e.g. Intel SnB family). NT/streaming stores definitely work on normal memory, though. – Peter Cordes Jul 8 '17 at 1:18 1 @Peter: You mean USWC memory right? I've never heard of UCSW or USWC memory before. Googling the wrong acronym wasn't helpful :-) – Andrew Bainbridge Aug 15 '17 at 11:29 @AndrewBainbridge: Yes, the WC memory type attribute. Uncacheable Speculative Write-Combining. I think I was capitalizing UnCacheable and remembering that it was supposed to be 4 letters long. :P – Peter Cordes Feb 26 at 20:00 add a comment