# ATE-DWM1000-C Datasheet * Hardware Version: 2.1 * Document Version: 1.0 * Nanjing ATE * Email: su.zhang@ate-nj.com ![ATE-DWM1000-C](https://box.kancloud.cn/c25118009ec9594409148db39eedeb3e_1886x907.jpg) [TOC] ## Brief Introduction ATE-DWM1000-C is a high performance UWB module which is pin to pin compariable with Decawave's [dwm1000](https://www.decawave.com/products/dwm1000-module). ## Comparisons between ATE-DWM1000-C and Decawave's dwm1000 | | Decawave's dw1000 | ATE-DWM1000-C | | --- | --- | --- | | size | `$ 23mm\times 13mm $` | | | crystal | | 2ppm TCXO| |antenna|Chip Antenna | ipex port for external antenna | | external clock | - | ipex port for external clock | |sleep mode current| |1mA | ## Features * IEEE802.15.4-2011 UWB compliant * Supports 6RF bands from 3.5GHz to 6.5GHz * Programmable transmitter output power * Fully coherent receiver for maximum range and accuracy * Complies with FCC&ETSI UWB spectral masks * Supply voltage 2.8V to 3.6V * Low power consumption * SLEEP mode and DEEP SLEEP mode current 1mA * Data rates of 110kbps, 850kbps, 6.8Mbps * Maximum packet length of 1023bytes for high data throughput applications * Integrated MAC support features * Supports 2-way ranging and TDOA * SPI interface to host processor * Small number of external components * Supports precision location and data transfer concurrently * Asset location to a precision of 10cm * Extended communications range up to 290m@110kbps 10% PER minimizes required infrastructure in RTLS * High multipath fading immunity * Small PCB footprint allows cost-effective hardware implementations * Long battery life minimizes system lifetime cost ## Applications * Precision real time location systems(RTLS)using two-way ranging or TDOA schemes in a variety of markets: - Healthcare - Consumer - Industrial - Other * Location aware wireless sensor networks ## Description The DW1000 module is designed based on dw1000,the dw1000 is a fully integrated single chip Ultra Wideband(UWB) low-power low-cost transceiver IC compliant to IEEE802.15.4-2011. It can be used in 2-way ranging or TDOA location systems to locate assets to a precision of 15cm. It also supports data transfer at rates up to 6.8Mbps. ## Spectrum Information ### TX This module support six |Channel|Center Frequency/MHz| Frequency Range/MHz|Tx Spectral densitydBm/MHz|Bandwidth /MHz| Tx Power /dBm| |---|---|---|---|---|---| |1 |3494.4 |3244.8 – 3744 |-41.5 |499.2 |-14.517| |2| 3993.6 |3774 – 4243.2 |-41.5 |499.2 |-14.517| |3| 4492.8 |4243.2 – 4742.4 | -41.5 |499.2 |-14.517| |4| 3993.6 |3328 – 4659.2 |-41.5 |1331.2 |-10.257| |5| 6489.6 |6240 – 6739.2 |-41.5 |499.2 |-14.517| |7|6489.6 |5980.3 – 6998.9 | -41.5 |1081.6 |-11.159| ### RX * receiving sensitivity 速率 灵敏度/dbm 前导码长度 110K -106 2048 850K -102 1024 6.8M -94 256 ## Block Diagram ## Electrical Specifications ### DC Characteristics 电流测试 仪器名称 ### Nominal Operating Conditions Parameter | Min|Typ|Max|Units ---|---|---|---|--- Operating temperature |-40||+85|℃ Supply voltage VDDIOA |2.8|3.3|3.6|V Supply voltage VDDBATT,VDDAON,VDDLNA, VDDPA,|2.8|3.3|3.6|V Supply voltage VDDLDOA,VDDLDOD|1.6|1.8|3.6|V Optional:Supply voltage VDDIO|3.7|3.8|3.9|V Voltage on GPIO0..8,WAKEUP,RSTn,SPICSn,SPIMOSI,SPICLK,TESTMODE,FORCEON|||3.6|V ## 6 Module Information and Mechanical Drawing DW1000-V2: Pad Number| Name|Pin Type|Description ---|---|---|---|--- 1 | EXTON| Digital output |External device enable. Asserted during wake up process and held active until device enters sleep mode. Can be used to control external DC-DC converters or other circuits that are not required when the device is in sleep mode so as to minimize power consumption. 2 | WAKEUP | Digital input| When asserted into its active high state, the WAKEUP pin brings the DW1000 out of SLEEP or DEEPSLEEP states into operational mode. When this pin is not being used as WAKEUP it should be tied to VSSIO. 3| RSTn|Digital input/output |Reset pin. Active Low Output. May be pulled low by external open drain driver to reset the DW1000.Must not be pulled high by external. 4| SYNC|Digital input/output |The SYNC input pin is used for external synchronization. When the SYNC input functionality is not being used this pin may be reconfigured as a general purpose I/O pin, GPIO7. 5| VDDAON| Power| External supply for the Always-On (AON) portion of the chip. 6| VDD3v3_1 | Power| 7| VDD3v3_0 | Power| 8| VSS0| Ground| Negative I/O ring supply. Must be connected to ground. 9| GPIO6| Digital input/output| General purpose I/O pin. 10| GPIO5| Digital input/output| General purpose I/O pin. 11| GPIO4| Digital input/output| General purpose I/O pin. 12| GPIO3| Digital input/output| General purpose I/O pin. 13| GPIO2| Digital input/output| General purpose I/O pin. 14| GPIO1| Digital input/output| General purpose I/O pin. 15| GPIO0| Digital input/output| General purpose I/O pin. 16| VSS1| Digital input/output| Negative I/O ring supply. Must be connected to ground. 17|SPI_CSn| Digital input| SPI chip select. This is an active low enable input. The high-to-low transition on SPICSn signals the start of a new SPI transaction. SPICSn can also act as a wake-up signal to bring DW1000 out of either SLEEP or DEEPSLEEP states. 18| SPI_MOSI| Digital output| SPI data input. 19| SPI_MISO| Digital input| SPI data output. 20| SPI_CLK |Digital input |SPI clock. 21| VSS2| Ground| Negative I/O ring supply. Must be connected to ground. 22| IRQ |Digital input/output| interrupt Request output from the DW1000 to the host processor. By default IRQ is an active-high output but may be configured to be active low if required. For correct operation in SLEEP and DEEPSLEEP modes it should be configured for active high operation. This pin will float in SLEEP and DEEPSLEEP states and may cause spurious interrupts unless pulled low. When the IRQ functionality is not being used the pin may be reconfigured as a general purpose I/O line, GPIO8. This pin has an internal pulldown to VSSIO and can be left unconnected if not being used. 23| VSS3|Ground|Negative I/O ring supply. Must be connected to ground. 24|VSS4|Ground |Negative I/O ring supply. Must be connected to ground. ## 7 Reference Schematics